The present invention relates to monolithic inductors, more particularly, to high Quality factor monolithic inductors for use in differential circuits and circuits incorporating the same.
Monolithic inductors are important components for various circuit types such as low-noise amplifiers (LNAs), voltage controlled oscillators (VCOs), filters, impedance matching networks, etc. External components can be minimized when all passive components are integrated on-chip, so monolithic inductors are often used as narrow-band loads in various circuits such as amplifiers, oscillators, and mixers. Monolithic inductors can take either a planar form (e.g. single layer) or spiral form (e.g. where adjacent turns are interconnected by vias).
The quality factor (Q) of an inductor, measured by 2π ω [(peak magnetic energy—peak electric energy)/(energy loss in one oscillation cycle)], is primarily limited by conductor losses arising from metallization resistance, the conductive silicon substrate, and parasitic substrate capacitances (which lower the inductor self-resonant frequency). Time-varying magnetic fields penetrate the silicon substrate and cause eddy currents as per Lenz's law, thus resulting in power loss. Additionally, eddy currents create their own magnetic fields that oppose those of the monolithic inductor. This decreases the inductance of the inductor.
Conventional techniques for addressing the negative effects silicon substrates have on inductor Q include applying Q-enhancement through the use of active negative resistance elements (e.g. transconductors in positive feedback), use of high resistivity (>1 k Ω-cm) silicon substrates, and etching a pit in the silicon substrate under the inductors. However, many of these techniques are difficult and expensive to implement with conventional CMOS processing, and additionally, each of these techniques do not provide sufficient Q-enhancement for inductors operating in the multi-GHz frequency range. For example, at 10 GHz, substrate losses are more pronounced than at lower frequencies. Although eddy currents are still negligible when the substrate resistivity is at least 10 Ω-cm, the currents induced in the substrate by the capacitance between the inductor coil and the substrate dissipate energy and reduce the maximum achievable Q. Such capacitive substrate currents are shunted when a highly conductive solid ground shield is inserted between the coil and the substrate. This significantly increases Q at the expense of a somewhat reduced resonance frequency. However, one critical drawback with a solid ground shield is that the shield disturbs the magnetic field of the inductor. According to Lenz's law, image current, also known as loop current, will be induced in the solid ground shield by the magnetic field of the spiral inductor. The image current in the solid ground shield will flow in a direction opposite to that of the current in the spiral. The resulting negative mutual coupling between the currents reduces the magnetic field, and thus the overall inductance. Patterned ground shields overcome this limitation. By patterning the ground shield, the loop current path can be effectively cutoff. However, patterned ground shields allow capacitive current to flow. Additionally, patterned ground shields add capacitance which reduces the resonant frequency of the inductor. Furthermore, the ground line(s) coupled to the patterned shield can have significant currents induced therein, thus decreasing the total magnetic field, the inductance, and inductor Q.
Another conventional technique for further improving inductor Q includes differentially driving an unshielded symmetric spiral inductor with signals (e.g., voltages and currents) that are 180° out of phase (i.e. differential). See, for example, Danesh et al., “Differentially Driven Symmetric Microstrip Inductors,” IEEE Transactions on Microwave Theory and Techniques, pp. 332-341, Vol. 50, No. 1, January 2002. By driving an unshielded symmetric inductor with differential signals, the magnetic field produced by the parallel groups of conductors is reinforced and the overall inductance per unit area is increased. FIG. 1 illustrates a conventional unshielded symmetric inductor 100 comprising first coil 110 and second coil 120. Coil 110 can be driven by a signal at port 112 and coil 120 can be driven by a 180° phase-shifted version of the same signal at port 122. Although the voltages on adjacent conducting strips are anti-phase, current flows in the same direction along each adjacent conductor (i.e., signal currents i1 and i2 flow in the same direction on any particular side). The symmetric inductor is realized by joining groups of coupled conductive strips from one side of an axis of symmetry to the other using a number of cross-over and cross-under connections.
At lower frequencies, the input impedance in either a single-ended or differential connection is approximately the same, but as operating frequency increases, parasitic substrate capacitance and resistance become a factor. For differential excitation, parasitic substrate capacitance and resistance have a higher impedance at a given frequency as compared to single-ended excitation. This reduces the real part of the input impedance and increases the reactive component of the input impedance. Therefore, the inductor is improved when driven differentially, and the self-resonant frequency (or usable bandwidth of the inductor) increases due to the reduction in the effective parasitic capacitance.
To further enhance inductor Q, others have augmented the un-shielded differentially driven symmetric inductor concept as illustrated in FIG. 1 with a floating shield formed under the inductor. See, for example, Cheung et al., “Differentially-Shielded Monolithic Inductors,” IEEE 2003 Custom Integrated Circuits Conference, Proceedings of the IEEE, pp. 95-98, September 2003. By incorporating a floating shield between a differentially driven symmetric inductor and the substrate, the inductor Q is improved because the parasitic coupling effects of the substrate are reduced as described supra. Because the shield is floating, a virtual ground is realized on the shield.
Alternatively, a single-ended shield formed under a wire can be driven by a buffer amplifier having as close to unity gain and 0° phase shift as possible so to reduce the wiring capacitance between the wire and shield to equivalently zero. See, for example, U.S. Pat. No. 5,616,952 entitled “Semiconductor Device with structure to decrease wiring capacitance” (the '952 patent) and U.S. Pat. No. 6,833,603 (the '603 patent) assigned to the assignee hereof. In the '952 and '603 patents, the shield is driven by the output of a buffer amplifier having approximately the same voltage and phase as the wire or inductor to be shielded. Shunt capacitance can be reduced because it is proportional to the first time derivative of the voltage across the dielectric of the capacitor. In the ideal dynamically shielded inductor, there is no change in voltage across the parasitic shunt capacitance of the inductor coil. This can greatly increase Q. In the past, such as in the '952 and '603 Patents, this has been done using a buffer amplifier comprising either a common drain or common collector, because such devices have 0° phase shift from input to output. Both common drain and common collector are well known in the art. For example, see Gray and Meyer, Analysis and Design of ANALOG INTEGRATED CIRCUITS, 3rd Ed. (1993), pp. 210-215, TK7874.G688. However, common drain and common collector configurations have less than unity gain, typically −1 to −2 dB, and require a great deal of power to achieve close to unity gain. The low gain of these buffers makes it difficult to drive a single-ended shield with a sufficiently high enough voltage to realize the benefit in Q without consuming excessive DC power. Two stages of common source/emitter buffers can also be used, but the delay associated with both stages is typically too large to drive the shield effectively, especially at multi-GHz frequencies. Additionally, the bandwidth of common drain and common collector configurations have an upper limit for 0° phase shifted signals, thus limiting the application of such shields. Furthermore, by having the buffer amplifier external to the integrated circuit containing the inductor to be shielded as is the case in the '952 patent severely limits the effective frequency range of circuit to the MHz range due to the long feedback path and the parasitic effects associated with a signal received off-chip.
Therefore, there exists a need for monolithic inductors having a high Quality factor at operating frequencies in the multi-GHz range.